/home/arjun/llvm-project/llvm/include/llvm/Support/X86TargetParser.def
Line | Count | Source (jump to first uncovered line) |
1 | 0 | //===- X86TargetParser.def - X86 target parsing defines ---------*- C++ -*-===// |
2 | 0 | // |
3 | 0 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | 0 | // See https://llvm.org/LICENSE.txt for license information. |
5 | 0 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | 0 | // |
7 | 0 | //===----------------------------------------------------------------------===// |
8 | 0 | // |
9 | 0 | // This file provides defines to build up the X86 target parser's logic. |
10 | 0 | // |
11 | 0 | //===----------------------------------------------------------------------===// |
12 | 0 |
|
13 | 0 | // NOTE: NO INCLUDE GUARD DESIRED! |
14 | 0 |
|
15 | 0 | #ifndef X86_VENDOR |
16 | 0 | #define X86_VENDOR(ENUM, STR) |
17 | 0 | #endif |
18 | 0 | X86_VENDOR(VENDOR_INTEL, "intel") |
19 | 0 | X86_VENDOR(VENDOR_AMD, "amd") |
20 | 0 | #undef X86_VENDOR |
21 | 0 |
|
22 | 0 | // This macro is used to implement CPU types that have an alias. As of now |
23 | 0 | // there is only ever one alias. |
24 | 0 | #ifndef X86_CPU_TYPE_COMPAT_WITH_ALIAS |
25 | 0 | #define X86_CPU_TYPE_COMPAT_WITH_ALIAS(ARCHNAME, ENUM, STR, ALIAS) X86_CPU_TYPE_COMPAT(ARCHNAME, ENUM, STR) |
26 | 0 | #endif |
27 | 0 |
|
28 | 0 | // This macro is used for cpu types present in compiler-rt/libgcc. |
29 | 0 | #ifndef X86_CPU_TYPE_COMPAT |
30 | 0 | #define X86_CPU_TYPE_COMPAT(ARCHNAME, ENUM, STR) X86_CPU_TYPE(ARCHNAME, ENUM) |
31 | 0 | #endif |
32 | 0 |
|
33 | | #ifndef X86_CPU_TYPE |
34 | | #define X86_CPU_TYPE(ARCHNAME, ENUM) |
35 | | #endif |
36 | | // The first part of this list must match what is implemented in libgcc and |
37 | 0 | // compilert-rt. Clang uses this to know how to implement __builtin_cpu_is. |
38 | 0 | X86_CPU_TYPE_COMPAT_WITH_ALIAS("bonnell", INTEL_BONNELL, "bonnell", "atom") |
39 | 0 | X86_CPU_TYPE_COMPAT ("core2", INTEL_CORE2, "core2") |
40 | 0 | X86_CPU_TYPE_COMPAT ("nehalem", INTEL_COREI7, "corei7") |
41 | 0 | X86_CPU_TYPE_COMPAT_WITH_ALIAS("amdfam10", AMDFAM10H, "amdfam10h", "amdfam10") |
42 | 0 | X86_CPU_TYPE_COMPAT_WITH_ALIAS("bdver1", AMDFAM15H, "amdfam15h", "amdfam15") |
43 | 0 | X86_CPU_TYPE_COMPAT_WITH_ALIAS("silvermont", INTEL_SILVERMONT, "silvermont", "slm") |
44 | 0 | X86_CPU_TYPE_COMPAT ("knl", INTEL_KNL, "knl") |
45 | 0 | X86_CPU_TYPE_COMPAT ("btver1", AMD_BTVER1, "btver1") |
46 | 0 | X86_CPU_TYPE_COMPAT ("btver2", AMD_BTVER2, "btver2") |
47 | 0 | X86_CPU_TYPE_COMPAT ("znver1", AMDFAM17H, "amdfam17h") |
48 | 0 | X86_CPU_TYPE_COMPAT ("knm", INTEL_KNM, "knm") |
49 | 0 | X86_CPU_TYPE_COMPAT ("goldmont", INTEL_GOLDMONT, "goldmont") |
50 | 0 | X86_CPU_TYPE_COMPAT ("goldmont-plus", INTEL_GOLDMONT_PLUS, "goldmont-plus") |
51 | 0 | X86_CPU_TYPE_COMPAT ("tremont", INTEL_TREMONT, "tremont") |
52 | 0 | // Entries below this are not in libgcc/compiler-rt. |
53 | 0 | X86_CPU_TYPE ("i386", INTEL_i386) |
54 | 0 | X86_CPU_TYPE ("i486", INTEL_i486) |
55 | 0 | X86_CPU_TYPE ("pentium", INTEL_PENTIUM) |
56 | 0 | X86_CPU_TYPE ("pentium-mmx", INTEL_PENTIUM_MMX) |
57 | 0 | X86_CPU_TYPE ("pentiumpro", INTEL_PENTIUM_PRO) |
58 | 0 | X86_CPU_TYPE ("pentium2", INTEL_PENTIUM_II) |
59 | 0 | X86_CPU_TYPE ("pentium3", INTEL_PENTIUM_III) |
60 | 0 | X86_CPU_TYPE ("pentium4", INTEL_PENTIUM_IV) |
61 | 0 | X86_CPU_TYPE ("pentium-m", INTEL_PENTIUM_M) |
62 | 0 | X86_CPU_TYPE ("yonah", INTEL_CORE_DUO) |
63 | 0 | X86_CPU_TYPE ("nocona", INTEL_NOCONA) |
64 | 0 | X86_CPU_TYPE ("prescott", INTEL_PRESCOTT) |
65 | 0 | X86_CPU_TYPE ("i486", AMD_i486) |
66 | 0 | X86_CPU_TYPE ("pentium", AMDPENTIUM) |
67 | 0 | X86_CPU_TYPE ("athlon", AMD_ATHLON) |
68 | 0 | X86_CPU_TYPE ("athlon-xp", AMD_ATHLON_XP) |
69 | 0 | X86_CPU_TYPE ("k8", AMD_K8) |
70 | 0 | X86_CPU_TYPE ("k8-sse3", AMD_K8SSE3) |
71 | 0 | #undef X86_CPU_TYPE_COMPAT_WITH_ALIAS |
72 | 0 | #undef X86_CPU_TYPE_COMPAT |
73 | 0 | #undef X86_CPU_TYPE |
74 | 0 |
|
75 | 0 | // This macro is used for cpu subtypes present in compiler-rt/libgcc. |
76 | 0 | #ifndef X86_CPU_SUBTYPE_COMPAT |
77 | 0 | #define X86_CPU_SUBTYPE_COMPAT(ARCHNAME, ENUM, STR) X86_CPU_SUBTYPE(ARCHNAME, ENUM) |
78 | 0 | #endif |
79 | 0 |
|
80 | | #ifndef X86_CPU_SUBTYPE |
81 | | #define X86_CPU_SUBTYPE(ARCHNAME, ENUM) |
82 | | #endif |
83 | |
|
84 | 0 | // The first part of this list must match what is implemented in libgcc and |
85 | 0 | // compilert-rt. Clang uses this to know how to implement __builtin_cpu_is. |
86 | 0 | X86_CPU_SUBTYPE_COMPAT("nehalem", INTEL_COREI7_NEHALEM, "nehalem") |
87 | 0 | X86_CPU_SUBTYPE_COMPAT("westmere", INTEL_COREI7_WESTMERE, "westmere") |
88 | 0 | X86_CPU_SUBTYPE_COMPAT("sandybridge", INTEL_COREI7_SANDYBRIDGE, "sandybridge") |
89 | 0 | X86_CPU_SUBTYPE_COMPAT("amdfam10", AMDFAM10H_BARCELONA, "barcelona") |
90 | 0 | X86_CPU_SUBTYPE_COMPAT("amdfam10", AMDFAM10H_SHANGHAI, "shanghai") |
91 | 0 | X86_CPU_SUBTYPE_COMPAT("amdfam10", AMDFAM10H_ISTANBUL, "istanbul") |
92 | 0 | X86_CPU_SUBTYPE_COMPAT("bdver1", AMDFAM15H_BDVER1, "bdver1") |
93 | 0 | X86_CPU_SUBTYPE_COMPAT("bdver2", AMDFAM15H_BDVER2, "bdver2") |
94 | 0 | X86_CPU_SUBTYPE_COMPAT("bdver3", AMDFAM15H_BDVER3, "bdver3") |
95 | 0 | X86_CPU_SUBTYPE_COMPAT("bdver4", AMDFAM15H_BDVER4, "bdver4") |
96 | 0 | X86_CPU_SUBTYPE_COMPAT("znver1", AMDFAM17H_ZNVER1, "znver1") |
97 | 0 | X86_CPU_SUBTYPE_COMPAT("ivybridge", INTEL_COREI7_IVYBRIDGE, "ivybridge") |
98 | 0 | X86_CPU_SUBTYPE_COMPAT("haswell", INTEL_COREI7_HASWELL, "haswell") |
99 | 0 | X86_CPU_SUBTYPE_COMPAT("broadwell", INTEL_COREI7_BROADWELL, "broadwell") |
100 | 0 | X86_CPU_SUBTYPE_COMPAT("skylake", INTEL_COREI7_SKYLAKE, "skylake") |
101 | 0 | X86_CPU_SUBTYPE_COMPAT("skylake-avx512", INTEL_COREI7_SKYLAKE_AVX512, "skylake-avx512") |
102 | 0 | X86_CPU_SUBTYPE_COMPAT("cannonlake", INTEL_COREI7_CANNONLAKE, "cannonlake") |
103 | 0 | X86_CPU_SUBTYPE_COMPAT("icelake-client", INTEL_COREI7_ICELAKE_CLIENT, "icelake-client") |
104 | 0 | X86_CPU_SUBTYPE_COMPAT("icelake-server", INTEL_COREI7_ICELAKE_SERVER, "icelake-server") |
105 | 0 | X86_CPU_SUBTYPE_COMPAT("znver2", AMDFAM17H_ZNVER2, "znver2") |
106 | 0 | X86_CPU_SUBTYPE_COMPAT("cascadelake", INTEL_COREI7_CASCADELAKE, "cascadelake") |
107 | 0 | // Entries below this are not in libgcc/compiler-rt. |
108 | 0 | X86_CPU_SUBTYPE ("core2", INTEL_CORE2_65) |
109 | 0 | X86_CPU_SUBTYPE ("penryn", INTEL_CORE2_45) |
110 | 0 | X86_CPU_SUBTYPE ("k6", AMDPENTIUM_K6) |
111 | 0 | X86_CPU_SUBTYPE ("k6-2", AMDPENTIUM_K62) |
112 | 0 | X86_CPU_SUBTYPE ("k6-3", AMDPENTIUM_K63) |
113 | 0 | X86_CPU_SUBTYPE ("geode", AMDPENTIUM_GEODE) |
114 | 0 | X86_CPU_SUBTYPE ("cooperlake", INTEL_COREI7_COOPERLAKE) |
115 | 0 | X86_CPU_SUBTYPE ("tigerlake", INTEL_COREI7_TIGERLAKE) |
116 | 0 | #undef X86_CPU_SUBTYPE_COMPAT |
117 | 0 | #undef X86_CPU_SUBTYPE |
118 | 0 |
|
119 | 0 |
|
120 | 0 | // This macro is used for cpu types present in compiler-rt/libgcc. |
121 | 0 | #ifndef X86_FEATURE_COMPAT |
122 | 0 | #define X86_FEATURE_COMPAT(VAL, ENUM, STR) X86_FEATURE(VAL, ENUM) |
123 | 0 | #endif |
124 | 0 |
|
125 | 0 | #ifndef X86_FEATURE |
126 | 0 | #define X86_FEATURE(VAL, ENUM) |
127 | 0 | #endif |
128 | 0 | X86_FEATURE_COMPAT( 0, FEATURE_CMOV, "cmov") |
129 | 0 | X86_FEATURE_COMPAT( 1, FEATURE_MMX, "mmx") |
130 | 0 | X86_FEATURE_COMPAT( 2, FEATURE_POPCNT, "popcnt") |
131 | 0 | X86_FEATURE_COMPAT( 3, FEATURE_SSE, "sse") |
132 | 0 | X86_FEATURE_COMPAT( 4, FEATURE_SSE2, "sse2") |
133 | 0 | X86_FEATURE_COMPAT( 5, FEATURE_SSE3, "sse3") |
134 | 0 | X86_FEATURE_COMPAT( 6, FEATURE_SSSE3, "ssse3") |
135 | 0 | X86_FEATURE_COMPAT( 7, FEATURE_SSE4_1, "sse4.1") |
136 | 0 | X86_FEATURE_COMPAT( 8, FEATURE_SSE4_2, "sse4.2") |
137 | 0 | X86_FEATURE_COMPAT( 9, FEATURE_AVX, "avx") |
138 | 0 | X86_FEATURE_COMPAT(10, FEATURE_AVX2, "avx2") |
139 | 0 | X86_FEATURE_COMPAT(11, FEATURE_SSE4_A, "sse4a") |
140 | 0 | X86_FEATURE_COMPAT(12, FEATURE_FMA4, "fma4") |
141 | 0 | X86_FEATURE_COMPAT(13, FEATURE_XOP, "xop") |
142 | 0 | X86_FEATURE_COMPAT(14, FEATURE_FMA, "fma") |
143 | 0 | X86_FEATURE_COMPAT(15, FEATURE_AVX512F, "avx512f") |
144 | 0 | X86_FEATURE_COMPAT(16, FEATURE_BMI, "bmi") |
145 | 0 | X86_FEATURE_COMPAT(17, FEATURE_BMI2, "bmi2") |
146 | 0 | X86_FEATURE_COMPAT(18, FEATURE_AES, "aes") |
147 | 0 | X86_FEATURE_COMPAT(19, FEATURE_PCLMUL, "pclmul") |
148 | 0 | X86_FEATURE_COMPAT(20, FEATURE_AVX512VL, "avx512vl") |
149 | 0 | X86_FEATURE_COMPAT(21, FEATURE_AVX512BW, "avx512bw") |
150 | 0 | X86_FEATURE_COMPAT(22, FEATURE_AVX512DQ, "avx512dq") |
151 | 0 | X86_FEATURE_COMPAT(23, FEATURE_AVX512CD, "avx512cd") |
152 | 0 | X86_FEATURE_COMPAT(24, FEATURE_AVX512ER, "avx512er") |
153 | 0 | X86_FEATURE_COMPAT(25, FEATURE_AVX512PF, "avx512pf") |
154 | 0 | X86_FEATURE_COMPAT(26, FEATURE_AVX512VBMI, "avx512vbmi") |
155 | 0 | X86_FEATURE_COMPAT(27, FEATURE_AVX512IFMA, "avx512ifma") |
156 | 0 | X86_FEATURE_COMPAT(28, FEATURE_AVX5124VNNIW, "avx5124vnniw") |
157 | 0 | X86_FEATURE_COMPAT(29, FEATURE_AVX5124FMAPS, "avx5124fmaps") |
158 | 0 | X86_FEATURE_COMPAT(30, FEATURE_AVX512VPOPCNTDQ, "avx512vpopcntdq") |
159 | 0 | X86_FEATURE_COMPAT(31, FEATURE_AVX512VBMI2, "avx512vbmi2") |
160 | 0 | X86_FEATURE_COMPAT(32, FEATURE_GFNI, "gfni") |
161 | 0 | X86_FEATURE_COMPAT(33, FEATURE_VPCLMULQDQ, "vpclmulqdq") |
162 | 0 | X86_FEATURE_COMPAT(34, FEATURE_AVX512VNNI, "avx512vnni") |
163 | 0 | X86_FEATURE_COMPAT(35, FEATURE_AVX512BITALG, "avx512bitalg") |
164 | 0 | X86_FEATURE_COMPAT(36, FEATURE_AVX512BF16, "avx512bf16") |
165 | 0 | X86_FEATURE_COMPAT(37, FEATURE_AVX512VP2INTERSECT, "avx512vp2intersect") |
166 | 0 | // Features below here are not in libgcc/compiler-rt. |
167 | 0 | X86_FEATURE (64, FEATURE_MOVBE) |
168 | 0 | X86_FEATURE (65, FEATURE_ADX) |
169 | 0 | X86_FEATURE (66, FEATURE_EM64T) |
170 | 0 | X86_FEATURE (67, FEATURE_CLFLUSHOPT) |
171 | 0 | X86_FEATURE (68, FEATURE_SHA) |
172 | 0 | #undef X86_FEATURE_COMPAT |
173 | 0 | #undef X86_FEATURE |