/home/arjun/llvm-project/llvm/include/llvm/Support/ARMTargetParser.def
Line | Count | Source (jump to first uncovered line) |
1 | 0 | //===- ARMTargetParser.def - ARM target parsing defines ---------*- C++ -*-===// |
2 | 0 | // |
3 | 0 | // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. |
4 | 0 | // See https://llvm.org/LICENSE.txt for license information. |
5 | 0 | // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception |
6 | 0 | // |
7 | 0 | //===----------------------------------------------------------------------===// |
8 | 0 | // |
9 | 0 | // This file provides defines to build up the ARM target parser's logic. |
10 | 0 | // |
11 | 0 | //===----------------------------------------------------------------------===// |
12 | 0 |
|
13 | 0 | // NOTE: NO INCLUDE GUARD DESIRED! |
14 | 0 |
|
15 | 0 | #ifndef ARM_FPU |
16 | 0 | #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) |
17 | 0 | #endif |
18 | 0 | ARM_FPU("invalid", FK_INVALID, FPUVersion::NONE, NeonSupportLevel::None, FPURestriction::None) |
19 | 0 | ARM_FPU("none", FK_NONE, FPUVersion::NONE, NeonSupportLevel::None, FPURestriction::None) |
20 | 0 | ARM_FPU("vfp", FK_VFP, FPUVersion::VFPV2, NeonSupportLevel::None, FPURestriction::None) |
21 | 0 | ARM_FPU("vfpv2", FK_VFPV2, FPUVersion::VFPV2, NeonSupportLevel::None, FPURestriction::None) |
22 | 0 | ARM_FPU("vfpv3", FK_VFPV3, FPUVersion::VFPV3, NeonSupportLevel::None, FPURestriction::None) |
23 | 0 | ARM_FPU("vfpv3-fp16", FK_VFPV3_FP16, FPUVersion::VFPV3_FP16, NeonSupportLevel::None, FPURestriction::None) |
24 | 0 | ARM_FPU("vfpv3-d16", FK_VFPV3_D16, FPUVersion::VFPV3, NeonSupportLevel::None, FPURestriction::D16) |
25 | 0 | ARM_FPU("vfpv3-d16-fp16", FK_VFPV3_D16_FP16, FPUVersion::VFPV3_FP16, NeonSupportLevel::None, FPURestriction::D16) |
26 | 0 | ARM_FPU("vfpv3xd", FK_VFPV3XD, FPUVersion::VFPV3, NeonSupportLevel::None, FPURestriction::SP_D16) |
27 | 0 | ARM_FPU("vfpv3xd-fp16", FK_VFPV3XD_FP16, FPUVersion::VFPV3_FP16, NeonSupportLevel::None, FPURestriction::SP_D16) |
28 | 0 | ARM_FPU("vfpv4", FK_VFPV4, FPUVersion::VFPV4, NeonSupportLevel::None, FPURestriction::None) |
29 | 0 | ARM_FPU("vfpv4-d16", FK_VFPV4_D16, FPUVersion::VFPV4, NeonSupportLevel::None, FPURestriction::D16) |
30 | 0 | ARM_FPU("fpv4-sp-d16", FK_FPV4_SP_D16, FPUVersion::VFPV4, NeonSupportLevel::None, FPURestriction::SP_D16) |
31 | 0 | ARM_FPU("fpv5-d16", FK_FPV5_D16, FPUVersion::VFPV5, NeonSupportLevel::None, FPURestriction::D16) |
32 | 0 | ARM_FPU("fpv5-sp-d16", FK_FPV5_SP_D16, FPUVersion::VFPV5, NeonSupportLevel::None, FPURestriction::SP_D16) |
33 | 0 | ARM_FPU("fp-armv8", FK_FP_ARMV8, FPUVersion::VFPV5, NeonSupportLevel::None, FPURestriction::None) |
34 | 0 | ARM_FPU("fp-armv8-fullfp16-d16", FK_FP_ARMV8_FULLFP16_D16, FPUVersion::VFPV5_FULLFP16, NeonSupportLevel::None, FPURestriction::D16) |
35 | 0 | ARM_FPU("fp-armv8-fullfp16-sp-d16", FK_FP_ARMV8_FULLFP16_SP_D16, FPUVersion::VFPV5_FULLFP16, NeonSupportLevel::None, FPURestriction::SP_D16) |
36 | 0 | ARM_FPU("neon", FK_NEON, FPUVersion::VFPV3, NeonSupportLevel::Neon, FPURestriction::None) |
37 | 0 | ARM_FPU("neon-fp16", FK_NEON_FP16, FPUVersion::VFPV3_FP16, NeonSupportLevel::Neon, FPURestriction::None) |
38 | 0 | ARM_FPU("neon-vfpv4", FK_NEON_VFPV4, FPUVersion::VFPV4, NeonSupportLevel::Neon, FPURestriction::None) |
39 | 0 | ARM_FPU("neon-fp-armv8", FK_NEON_FP_ARMV8, FPUVersion::VFPV5, NeonSupportLevel::Neon, FPURestriction::None) |
40 | 0 | ARM_FPU("crypto-neon-fp-armv8", FK_CRYPTO_NEON_FP_ARMV8, FPUVersion::VFPV5, NeonSupportLevel::Crypto, |
41 | 0 | FPURestriction::None) |
42 | 0 | ARM_FPU("softvfp", FK_SOFTVFP, FPUVersion::NONE, NeonSupportLevel::None, FPURestriction::None) |
43 | 0 | #undef ARM_FPU |
44 | 0 |
|
45 | 0 | #ifndef ARM_ARCH |
46 | 0 | #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) |
47 | 0 | #endif |
48 | 0 | ARM_ARCH("invalid", INVALID, "", "", |
49 | 0 | ARMBuildAttrs::CPUArch::Pre_v4, FK_NONE, ARM::AEK_NONE) |
50 | 0 | ARM_ARCH("armv2", ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4, |
51 | 0 | FK_NONE, ARM::AEK_NONE) |
52 | 0 | ARM_ARCH("armv2a", ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4, |
53 | 0 | FK_NONE, ARM::AEK_NONE) |
54 | 0 | ARM_ARCH("armv3", ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4, |
55 | 0 | FK_NONE, ARM::AEK_NONE) |
56 | 0 | ARM_ARCH("armv3m", ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4, |
57 | 0 | FK_NONE, ARM::AEK_NONE) |
58 | 0 | ARM_ARCH("armv4", ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4, |
59 | 0 | FK_NONE, ARM::AEK_NONE) |
60 | 0 | ARM_ARCH("armv4t", ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T, |
61 | 0 | FK_NONE, ARM::AEK_NONE) |
62 | 0 | ARM_ARCH("armv5t", ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T, |
63 | 0 | FK_NONE, ARM::AEK_NONE) |
64 | 0 | ARM_ARCH("armv5te", ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE, |
65 | 0 | FK_NONE, ARM::AEK_DSP) |
66 | 0 | ARM_ARCH("armv5tej", ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ, |
67 | 0 | FK_NONE, ARM::AEK_DSP) |
68 | 0 | ARM_ARCH("armv6", ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6, |
69 | 0 | FK_VFPV2, ARM::AEK_DSP) |
70 | 0 | ARM_ARCH("armv6k", ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K, |
71 | 0 | FK_VFPV2, ARM::AEK_DSP) |
72 | 0 | ARM_ARCH("armv6t2", ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2, |
73 | 0 | FK_NONE, ARM::AEK_DSP) |
74 | 0 | ARM_ARCH("armv6kz", ARMV6KZ, "6KZ", "v6kz", ARMBuildAttrs::CPUArch::v6KZ, |
75 | 0 | FK_VFPV2, (ARM::AEK_SEC | ARM::AEK_DSP)) |
76 | 0 | ARM_ARCH("armv6-m", ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M, |
77 | 0 | FK_NONE, ARM::AEK_NONE) |
78 | 0 | ARM_ARCH("armv7-a", ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7, |
79 | 0 | FK_NEON, ARM::AEK_DSP) |
80 | 0 | ARM_ARCH("armv7ve", ARMV7VE, "7VE", "v7ve", ARMBuildAttrs::CPUArch::v7, |
81 | 0 | FK_NEON, (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | |
82 | 0 | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP)) |
83 | 0 | ARM_ARCH("armv7-r", ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7, |
84 | 0 | FK_NONE, (ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP)) |
85 | 0 | ARM_ARCH("armv7-m", ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7, |
86 | 0 | FK_NONE, ARM::AEK_HWDIVTHUMB) |
87 | 0 | ARM_ARCH("armv7e-m", ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M, |
88 | 0 | FK_NONE, (ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP)) |
89 | 0 | ARM_ARCH("armv8-a", ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8_A, |
90 | 0 | FK_CRYPTO_NEON_FP_ARMV8, |
91 | 0 | (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | |
92 | 0 | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC)) |
93 | 0 | ARM_ARCH("armv8.1-a", ARMV8_1A, "8.1-A", "v8.1a", |
94 | 0 | ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8, |
95 | 0 | (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | |
96 | 0 | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC)) |
97 | 0 | ARM_ARCH("armv8.2-a", ARMV8_2A, "8.2-A", "v8.2a", |
98 | 0 | ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8, |
99 | 0 | (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | |
100 | 0 | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS)) |
101 | 0 | ARM_ARCH("armv8.3-a", ARMV8_3A, "8.3-A", "v8.3a", |
102 | 0 | ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8, |
103 | 0 | (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | |
104 | 0 | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS)) |
105 | 0 | ARM_ARCH("armv8.4-a", ARMV8_4A, "8.4-A", "v8.4a", |
106 | 0 | ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8, |
107 | 0 | (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | |
108 | 0 | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS | |
109 | 0 | ARM::AEK_DOTPROD)) |
110 | 0 | ARM_ARCH("armv8.5-a", ARMV8_5A, "8.5-A", "v8.5a", |
111 | 0 | ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8, |
112 | 0 | (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | |
113 | 0 | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS | |
114 | 0 | ARM::AEK_DOTPROD)) |
115 | 0 | ARM_ARCH("armv8.6-a", ARMV8_6A, "8.6-A", "v8.6a", |
116 | 0 | ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8, |
117 | 0 | (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | |
118 | 0 | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS | |
119 | 0 | ARM::AEK_DOTPROD | ARM::AEK_BF16 | ARM::AEK_SHA2 | ARM::AEK_AES | |
120 | 0 | ARM::AEK_I8MM)) |
121 | 0 | ARM_ARCH("armv8-r", ARMV8R, "8-R", "v8r", ARMBuildAttrs::CPUArch::v8_R, |
122 | 0 | FK_NEON_FP_ARMV8, |
123 | 0 | (ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | |
124 | 0 | ARM::AEK_DSP | ARM::AEK_CRC)) |
125 | 0 | ARM_ARCH("armv8-m.base", ARMV8MBaseline, "8-M.Baseline", "v8m.base", |
126 | 0 | ARMBuildAttrs::CPUArch::v8_M_Base, FK_NONE, ARM::AEK_HWDIVTHUMB) |
127 | 0 | ARM_ARCH("armv8-m.main", ARMV8MMainline, "8-M.Mainline", "v8m.main", |
128 | 0 | ARMBuildAttrs::CPUArch::v8_M_Main, FK_FPV5_D16, ARM::AEK_HWDIVTHUMB) |
129 | 0 | ARM_ARCH("armv8.1-m.main", ARMV8_1MMainline, "8.1-M.Mainline", "v8.1m.main", |
130 | 0 | ARMBuildAttrs::CPUArch::v8_1_M_Main, FK_FP_ARMV8_FULLFP16_SP_D16, ARM::AEK_HWDIVTHUMB | ARM::AEK_RAS | ARM::AEK_LOB) |
131 | 0 | // Non-standard Arch names. |
132 | 0 | ARM_ARCH("iwmmxt", IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE, |
133 | 0 | FK_NONE, ARM::AEK_NONE) |
134 | 0 | ARM_ARCH("iwmmxt2", IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE, |
135 | 0 | FK_NONE, ARM::AEK_NONE) |
136 | 0 | ARM_ARCH("xscale", XSCALE, "xscale", "v5e", ARMBuildAttrs::CPUArch::v5TE, |
137 | 0 | FK_NONE, ARM::AEK_NONE) |
138 | 0 | ARM_ARCH("armv7s", ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7, |
139 | 0 | FK_NEON_VFPV4, ARM::AEK_DSP) |
140 | 0 | ARM_ARCH("armv7k", ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7, |
141 | 0 | FK_NONE, ARM::AEK_DSP) |
142 | 0 | #undef ARM_ARCH |
143 | 0 |
|
144 | 0 | #ifndef ARM_ARCH_EXT_NAME |
145 | 0 | #define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) |
146 | 0 | #endif |
147 | 0 | // FIXME: This would be nicer were it tablegen |
148 | 0 | ARM_ARCH_EXT_NAME("invalid", ARM::AEK_INVALID, nullptr, nullptr) |
149 | 0 | ARM_ARCH_EXT_NAME("none", ARM::AEK_NONE, nullptr, nullptr) |
150 | 0 | ARM_ARCH_EXT_NAME("crc", ARM::AEK_CRC, "+crc", "-crc") |
151 | 0 | ARM_ARCH_EXT_NAME("crypto", ARM::AEK_CRYPTO, "+crypto","-crypto") |
152 | 0 | ARM_ARCH_EXT_NAME("sha2", ARM::AEK_SHA2, "+sha2", "-sha2") |
153 | 0 | ARM_ARCH_EXT_NAME("aes", ARM::AEK_AES, "+aes", "-aes") |
154 | 0 | ARM_ARCH_EXT_NAME("dotprod", ARM::AEK_DOTPROD, "+dotprod","-dotprod") |
155 | 0 | ARM_ARCH_EXT_NAME("dsp", ARM::AEK_DSP, "+dsp", "-dsp") |
156 | 0 | ARM_ARCH_EXT_NAME("fp", ARM::AEK_FP, nullptr, nullptr) |
157 | 0 | ARM_ARCH_EXT_NAME("fp.dp", ARM::AEK_FP_DP, nullptr, nullptr) |
158 | 0 | ARM_ARCH_EXT_NAME("mve", (ARM::AEK_DSP | ARM::AEK_SIMD), "+mve", "-mve") |
159 | 0 | ARM_ARCH_EXT_NAME("mve.fp", (ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP), "+mve.fp", "-mve.fp") |
160 | 0 | ARM_ARCH_EXT_NAME("idiv", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB), nullptr, nullptr) |
161 | 0 | ARM_ARCH_EXT_NAME("mp", ARM::AEK_MP, nullptr, nullptr) |
162 | 0 | ARM_ARCH_EXT_NAME("simd", ARM::AEK_SIMD, nullptr, nullptr) |
163 | 0 | ARM_ARCH_EXT_NAME("sec", ARM::AEK_SEC, nullptr, nullptr) |
164 | 0 | ARM_ARCH_EXT_NAME("virt", ARM::AEK_VIRT, nullptr, nullptr) |
165 | 0 | ARM_ARCH_EXT_NAME("fp16", ARM::AEK_FP16, "+fullfp16", "-fullfp16") |
166 | 0 | ARM_ARCH_EXT_NAME("ras", ARM::AEK_RAS, "+ras", "-ras") |
167 | 0 | ARM_ARCH_EXT_NAME("os", ARM::AEK_OS, nullptr, nullptr) |
168 | 0 | ARM_ARCH_EXT_NAME("iwmmxt", ARM::AEK_IWMMXT, nullptr, nullptr) |
169 | 0 | ARM_ARCH_EXT_NAME("iwmmxt2", ARM::AEK_IWMMXT2, nullptr, nullptr) |
170 | 0 | ARM_ARCH_EXT_NAME("maverick", ARM::AEK_MAVERICK, nullptr, nullptr) |
171 | 0 | ARM_ARCH_EXT_NAME("xscale", ARM::AEK_XSCALE, nullptr, nullptr) |
172 | 0 | ARM_ARCH_EXT_NAME("fp16fml", ARM::AEK_FP16FML, "+fp16fml", "-fp16fml") |
173 | 0 | ARM_ARCH_EXT_NAME("bf16", ARM::AEK_BF16, "+bf16", "-bf16") |
174 | 0 | ARM_ARCH_EXT_NAME("sb", ARM::AEK_SB, "+sb", "-sb") |
175 | 0 | ARM_ARCH_EXT_NAME("i8mm", ARM::AEK_I8MM, "+i8mm", "-i8mm") |
176 | 0 | ARM_ARCH_EXT_NAME("lob", ARM::AEK_LOB, "+lob", "-lob") |
177 | 0 | ARM_ARCH_EXT_NAME("cdecp0", ARM::AEK_CDECP0, "+cdecp0", "-cdecp0") |
178 | 0 | ARM_ARCH_EXT_NAME("cdecp1", ARM::AEK_CDECP1, "+cdecp1", "-cdecp1") |
179 | 0 | ARM_ARCH_EXT_NAME("cdecp2", ARM::AEK_CDECP2, "+cdecp2", "-cdecp2") |
180 | 0 | ARM_ARCH_EXT_NAME("cdecp3", ARM::AEK_CDECP3, "+cdecp3", "-cdecp3") |
181 | 0 | ARM_ARCH_EXT_NAME("cdecp4", ARM::AEK_CDECP4, "+cdecp4", "-cdecp4") |
182 | 0 | ARM_ARCH_EXT_NAME("cdecp5", ARM::AEK_CDECP5, "+cdecp5", "-cdecp5") |
183 | 0 | ARM_ARCH_EXT_NAME("cdecp6", ARM::AEK_CDECP6, "+cdecp6", "-cdecp6") |
184 | 0 | ARM_ARCH_EXT_NAME("cdecp7", ARM::AEK_CDECP7, "+cdecp7", "-cdecp7") |
185 | 0 | #undef ARM_ARCH_EXT_NAME |
186 | 0 |
|
187 | 0 | #ifndef ARM_HW_DIV_NAME |
188 | 0 | #define ARM_HW_DIV_NAME(NAME, ID) |
189 | 0 | #endif |
190 | 0 | ARM_HW_DIV_NAME("invalid", ARM::AEK_INVALID) |
191 | 0 | ARM_HW_DIV_NAME("none", ARM::AEK_NONE) |
192 | 0 | ARM_HW_DIV_NAME("thumb", ARM::AEK_HWDIVTHUMB) |
193 | 0 | ARM_HW_DIV_NAME("arm", ARM::AEK_HWDIVARM) |
194 | 0 | ARM_HW_DIV_NAME("arm,thumb", (ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB)) |
195 | 0 | #undef ARM_HW_DIV_NAME |
196 | 0 |
|
197 | | #ifndef ARM_CPU_NAME |
198 | | #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) |
199 | | #endif |
200 | 0 | ARM_CPU_NAME("arm2", ARMV2, FK_NONE, true, ARM::AEK_NONE) |
201 | 0 | ARM_CPU_NAME("arm3", ARMV2A, FK_NONE, true, ARM::AEK_NONE) |
202 | 0 | ARM_CPU_NAME("arm6", ARMV3, FK_NONE, true, ARM::AEK_NONE) |
203 | 0 | ARM_CPU_NAME("arm7m", ARMV3M, FK_NONE, true, ARM::AEK_NONE) |
204 | 0 | ARM_CPU_NAME("arm8", ARMV4, FK_NONE, false, ARM::AEK_NONE) |
205 | 0 | ARM_CPU_NAME("arm810", ARMV4, FK_NONE, false, ARM::AEK_NONE) |
206 | 0 | ARM_CPU_NAME("strongarm", ARMV4, FK_NONE, true, ARM::AEK_NONE) |
207 | 0 | ARM_CPU_NAME("strongarm110", ARMV4, FK_NONE, false, ARM::AEK_NONE) |
208 | 0 | ARM_CPU_NAME("strongarm1100", ARMV4, FK_NONE, false, ARM::AEK_NONE) |
209 | 0 | ARM_CPU_NAME("strongarm1110", ARMV4, FK_NONE, false, ARM::AEK_NONE) |
210 | 0 | ARM_CPU_NAME("arm7tdmi", ARMV4T, FK_NONE, true, ARM::AEK_NONE) |
211 | 0 | ARM_CPU_NAME("arm7tdmi-s", ARMV4T, FK_NONE, false, ARM::AEK_NONE) |
212 | 0 | ARM_CPU_NAME("arm710t", ARMV4T, FK_NONE, false, ARM::AEK_NONE) |
213 | 0 | ARM_CPU_NAME("arm720t", ARMV4T, FK_NONE, false, ARM::AEK_NONE) |
214 | 0 | ARM_CPU_NAME("arm9", ARMV4T, FK_NONE, false, ARM::AEK_NONE) |
215 | 0 | ARM_CPU_NAME("arm9tdmi", ARMV4T, FK_NONE, false, ARM::AEK_NONE) |
216 | 0 | ARM_CPU_NAME("arm920", ARMV4T, FK_NONE, false, ARM::AEK_NONE) |
217 | 0 | ARM_CPU_NAME("arm920t", ARMV4T, FK_NONE, false, ARM::AEK_NONE) |
218 | 0 | ARM_CPU_NAME("arm922t", ARMV4T, FK_NONE, false, ARM::AEK_NONE) |
219 | 0 | ARM_CPU_NAME("arm9312", ARMV4T, FK_NONE, false, ARM::AEK_NONE) |
220 | 0 | ARM_CPU_NAME("arm940t", ARMV4T, FK_NONE, false, ARM::AEK_NONE) |
221 | 0 | ARM_CPU_NAME("ep9312", ARMV4T, FK_NONE, false, ARM::AEK_NONE) |
222 | 0 | ARM_CPU_NAME("arm10tdmi", ARMV5T, FK_NONE, true, ARM::AEK_NONE) |
223 | 0 | ARM_CPU_NAME("arm1020t", ARMV5T, FK_NONE, false, ARM::AEK_NONE) |
224 | 0 | ARM_CPU_NAME("arm9e", ARMV5TE, FK_NONE, false, ARM::AEK_NONE) |
225 | 0 | ARM_CPU_NAME("arm946e-s", ARMV5TE, FK_NONE, false, ARM::AEK_NONE) |
226 | 0 | ARM_CPU_NAME("arm966e-s", ARMV5TE, FK_NONE, false, ARM::AEK_NONE) |
227 | 0 | ARM_CPU_NAME("arm968e-s", ARMV5TE, FK_NONE, false, ARM::AEK_NONE) |
228 | 0 | ARM_CPU_NAME("arm10e", ARMV5TE, FK_NONE, false, ARM::AEK_NONE) |
229 | 0 | ARM_CPU_NAME("arm1020e", ARMV5TE, FK_NONE, false, ARM::AEK_NONE) |
230 | 0 | ARM_CPU_NAME("arm1022e", ARMV5TE, FK_NONE, true, ARM::AEK_NONE) |
231 | 0 | ARM_CPU_NAME("arm926ej-s", ARMV5TEJ, FK_NONE, true, ARM::AEK_NONE) |
232 | 0 | ARM_CPU_NAME("arm1136j-s", ARMV6, FK_NONE, false, ARM::AEK_NONE) |
233 | 0 | ARM_CPU_NAME("arm1136jf-s", ARMV6, FK_VFPV2, true, ARM::AEK_NONE) |
234 | 0 | ARM_CPU_NAME("arm1136jz-s", ARMV6, FK_NONE, false, ARM::AEK_NONE) |
235 | 0 | ARM_CPU_NAME("mpcore", ARMV6K, FK_VFPV2, true, ARM::AEK_NONE) |
236 | 0 | ARM_CPU_NAME("mpcorenovfp", ARMV6K, FK_NONE, false, ARM::AEK_NONE) |
237 | 0 | ARM_CPU_NAME("arm1176jz-s", ARMV6KZ, FK_NONE, false, ARM::AEK_NONE) |
238 | 0 | ARM_CPU_NAME("arm1176jzf-s", ARMV6KZ, FK_VFPV2, true, ARM::AEK_NONE) |
239 | 0 | ARM_CPU_NAME("arm1156t2-s", ARMV6T2, FK_NONE, true, ARM::AEK_NONE) |
240 | 0 | ARM_CPU_NAME("arm1156t2f-s", ARMV6T2, FK_VFPV2, false, ARM::AEK_NONE) |
241 | 0 | ARM_CPU_NAME("cortex-m0", ARMV6M, FK_NONE, true, ARM::AEK_NONE) |
242 | 0 | ARM_CPU_NAME("cortex-m0plus", ARMV6M, FK_NONE, false, ARM::AEK_NONE) |
243 | 0 | ARM_CPU_NAME("cortex-m1", ARMV6M, FK_NONE, false, ARM::AEK_NONE) |
244 | 0 | ARM_CPU_NAME("sc000", ARMV6M, FK_NONE, false, ARM::AEK_NONE) |
245 | 0 | ARM_CPU_NAME("cortex-a5", ARMV7A, FK_NEON_VFPV4, false, |
246 | 0 | (ARM::AEK_SEC | ARM::AEK_MP)) |
247 | 0 | ARM_CPU_NAME("cortex-a7", ARMV7A, FK_NEON_VFPV4, false, |
248 | 0 | (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | |
249 | 0 | ARM::AEK_HWDIVTHUMB)) |
250 | 0 | ARM_CPU_NAME("cortex-a8", ARMV7A, FK_NEON, false, ARM::AEK_SEC) |
251 | 0 | ARM_CPU_NAME("cortex-a9", ARMV7A, FK_NEON_FP16, false, (ARM::AEK_SEC | ARM::AEK_MP)) |
252 | 0 | ARM_CPU_NAME("cortex-a12", ARMV7A, FK_NEON_VFPV4, false, |
253 | 0 | (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | |
254 | 0 | ARM::AEK_HWDIVTHUMB)) |
255 | 0 | ARM_CPU_NAME("cortex-a15", ARMV7A, FK_NEON_VFPV4, false, |
256 | 0 | (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | |
257 | 0 | ARM::AEK_HWDIVTHUMB)) |
258 | 0 | ARM_CPU_NAME("cortex-a17", ARMV7A, FK_NEON_VFPV4, false, |
259 | 0 | (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | |
260 | 0 | ARM::AEK_HWDIVTHUMB)) |
261 | 0 | ARM_CPU_NAME("krait", ARMV7A, FK_NEON_VFPV4, false, |
262 | 0 | (ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB)) |
263 | 0 | ARM_CPU_NAME("cortex-r4", ARMV7R, FK_NONE, true, ARM::AEK_NONE) |
264 | 0 | ARM_CPU_NAME("cortex-r4f", ARMV7R, FK_VFPV3_D16, false, ARM::AEK_NONE) |
265 | 0 | ARM_CPU_NAME("cortex-r5", ARMV7R, FK_VFPV3_D16, false, |
266 | 0 | (ARM::AEK_MP | ARM::AEK_HWDIVARM)) |
267 | 0 | ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false, |
268 | 0 | (ARM::AEK_MP | ARM::AEK_HWDIVARM)) |
269 | 0 | ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false, |
270 | 0 | (ARM::AEK_MP | ARM::AEK_HWDIVARM)) |
271 | 0 | ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE) |
272 | 0 | ARM_CPU_NAME("sc300", ARMV7M, FK_NONE, false, ARM::AEK_NONE) |
273 | 0 | ARM_CPU_NAME("cortex-m3", ARMV7M, FK_NONE, true, ARM::AEK_NONE) |
274 | 0 | ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE) |
275 | 0 | ARM_CPU_NAME("cortex-m7", ARMV7EM, FK_FPV5_D16, false, ARM::AEK_NONE) |
276 | 0 | ARM_CPU_NAME("cortex-m23", ARMV8MBaseline, FK_NONE, false, ARM::AEK_NONE) |
277 | 0 | ARM_CPU_NAME("cortex-m33", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP) |
278 | 0 | ARM_CPU_NAME("cortex-m35p", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP) |
279 | 0 | ARM_CPU_NAME("cortex-m55", ARMV8_1MMainline, FK_FP_ARMV8_FULLFP16_D16, false, |
280 | 0 | (ARM::AEK_DSP | ARM::AEK_SIMD | ARM::AEK_FP | ARM::AEK_FP16)) |
281 | 0 | ARM_CPU_NAME("cortex-a32", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) |
282 | 0 | ARM_CPU_NAME("cortex-a35", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) |
283 | 0 | ARM_CPU_NAME("cortex-a53", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) |
284 | 0 | ARM_CPU_NAME("cortex-a55", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, |
285 | 0 | (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) |
286 | 0 | ARM_CPU_NAME("cortex-a57", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) |
287 | 0 | ARM_CPU_NAME("cortex-a72", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) |
288 | 0 | ARM_CPU_NAME("cortex-a73", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) |
289 | 0 | ARM_CPU_NAME("cortex-a75", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, |
290 | 0 | (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) |
291 | 0 | ARM_CPU_NAME("cortex-a76", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, |
292 | 0 | (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) |
293 | 0 | ARM_CPU_NAME("cortex-a76ae", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, |
294 | 0 | (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) |
295 | 0 | ARM_CPU_NAME("neoverse-n1", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, |
296 | 0 | (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) |
297 | 0 | ARM_CPU_NAME("cyclone", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) |
298 | 0 | ARM_CPU_NAME("exynos-m3", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) |
299 | 0 | ARM_CPU_NAME("exynos-m4", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, |
300 | 0 | (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) |
301 | 0 | ARM_CPU_NAME("exynos-m5", ARMV8_2A, FK_CRYPTO_NEON_FP_ARMV8, false, |
302 | 0 | (ARM::AEK_FP16 | ARM::AEK_DOTPROD)) |
303 | 0 | ARM_CPU_NAME("kryo", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC) |
304 | 0 | // Non-standard Arch names. |
305 | 0 | ARM_CPU_NAME("iwmmxt", IWMMXT, FK_NONE, true, ARM::AEK_NONE) |
306 | 0 | ARM_CPU_NAME("xscale", XSCALE, FK_NONE, true, ARM::AEK_NONE) |
307 | 0 | ARM_CPU_NAME("swift", ARMV7S, FK_NEON_VFPV4, true, |
308 | 0 | (ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB)) |
309 | 0 | // Invalid CPU |
310 | 0 | ARM_CPU_NAME("invalid", INVALID, FK_INVALID, true, ARM::AEK_INVALID) |
311 | 0 | #undef ARM_CPU_NAME |